一种用于无线接收机的噪声整形可重构复数带通/低通滤波器的设计

A reconfigurable complex band-pass （CBP）/low-pass （LP） active-RC filter with a noise-shaping technique for wireless receivers is presented. Its bandwidth is reconfigurable among 500 kHz, 1 MHz and 4 MHz in LP mode and 1 MHz, 2 MHz and 8 MHz in CBP mode with 3 MHz center frequency. The Op-Amps used in the filter are realized in cell arrays in order to obtain scalable power consumption among the different operation modes. Furthermore, the filter can be configured into the 1st order, 2nd order or 3rd order mode, thus achieving a flexible filtering property. The noise-shaping technique is introduced to suppress the flicker noise contribution. The filter has been implemented in 180 nm CMOS and consumes less than 3 mA in the 3rd 8 MHz-bandwidth CBP mode. The spot noise at 100 Hz can be reduced by 14.4 dB at most with the introduced noise-shaping technique.     

低缺陷密度和平整表面的硅基砷化镓外延

Device-quality GaAs thin films have been grown on miscut Ge-on-Si substrates by metal-organic chemical vapor deposition. A method of two-step epitaxy of GaAs is performed to achieve a high-quality top-layer. The initial thin buffer layer at 360 ℃ is critical for the suppression of anti-phase boundaries and threading dislocations. The etch pit density ofGaAs epilayers by KOH etching could reach 2.25 × 10^5 cm^-2 and high-quality GaAs top epilayers are observed by transmission electron microscopy. The band-to-band photoluminescence property of GaAs epilayers on different substrates is also investigated and negative band shifts of several to tens of meVs are found because of tensile strains in the GaAs epilayers. To achieve a smooth surface, a polishing process is performed, followed by a second epitaxy of GaAs. The root-mean-square roughness of the GaAs surface could be less than 1 nm, which is comparable with that of homo-epitaxial GaAs. These low-defect and smooth GaAs epilayers on Si are desirable for GaAs-based devices on silicon substrates.     

A power scalable PLL frequency synthesizer for high-speed △-∑ ADC

A 35-130 MHz/300-360 MHz phase-locked loop frequency synthesizer for △-∑ analog-to-digital con- verter （ADC） in 65 nm CMOS is presented. The frequency synthesizer can work in low phase-noise mode （300-360 MHz） or in low-power mode （35-130 MHz） to satisfy the ADC＇s requirements. To switch between these two modes, a high frequency GHz LC VCO followed by a divided-by-four frequency divider and a low frequency ring VCO followed by a divided-by-two frequency divider are integrated on-chip. The measured results show that the fre- quency synthesizer achieves a phase-noise of-132 dBc/Hz at 1 MHz offset and an integrated RMS jitter of 1.12 ps with 1.74 mW power consumption from a 1.2 V power supply in low phase-noise mode. In low-power mode, the frequency synthesizer achieves a phase-noise of-112 dBc/Hz at 1 MHz offset and an integrated RMS jitter of 7.23 ps with 0.92 mW power consumption from a 1.2 V power supply.     

Highly efficient blue electrophosphorescent devices with a novel host material

Highly efficient blue electrophosphorscent light emitting diodes with a new host material N,N′-dicarbazolyl-1,4-dimethene-benzene (DCB) were demonstrated. The energy transfer mechanism of the host–guest material system consisting of DCB and bis[(4,6-difluorophenyl)-pyridinato-N,C²′] (picolinato) Ir(III) (FIrpic) is an exothermic process. The device with a configuration of indium tin oxide/ N,N′-diphenyl-N,N′-bis(1,1′-biphenyl)-4,4′-diamine (NPB)/DCB:FIrpic/4,7-diphenyl-1,10-phenanthroline(BPhen)/Mg:Ag was optimized by adjusting the thickness of emitting layer and the dopant concentration. The device with the 8% (weight ratio) FIrpic and 30 nm emitting layer exhibits the maximum external quantum efficiency and current efficiency of 5.8% and 9.8 cd/A, respectively, at the luminance of 22 cd/m² driven at the voltage of 6.0 V.     

L波段数字声广播接收机CMOS集成模拟前端

本文设计了使用CMOS工艺,单片集成的L波段数字声广播(DAB)接收机模拟前端.接收机前端应用了三种方法来提高镜像抑制度:低中频双正交weaver结构比一般的同相/正交(I/Q)两路下变频结构具有更高的镜像抑制能力;镜像抑制低噪声放大器(LNA)提供了额外的镜像信号抑制;具有相位和幅度校正功能的本振驱动器提供了更精确的正交本振信号.仿真显示接收机前端对镜像信号的抑制超过65dB,其级联噪声指数为4dB,输出三阶交调指数为22dBm.接收机前端使用TSMC 0.25μm CMOS工艺制作,版图核心面积为9mm²,目前正在测试中.     

Coupled quantum dots: effect of inter-dot interactions

The effect of inter-dot many body interactions on the transport properties of coupled dots connected to leads is studied. Results are obtained by exactly diagonalizing a cluster composed by the double-dot and its vicinity, which is then connected to the leads. We analyse two configurations: coupled dots aligned and perpendicular to the leads. We show that in the weak coupling limit they present quite different conductance features as a function of gate potential. In the strong coupling limit they show qualitatively similar behaviour.     

An Ultra Wideband VHF CMOS LC VCO

实现了一个宽频带VHF频段CMOS VCO.其最大的改进在于将振荡器中交叉耦合MOS管分为并联可开关的若干段.这样使其特性可以在较大范围内补偿VCO调频过程中状态的变化.该VCO使用标准0.18μmCMOS工艺制作,核心版图面积约为550μm×700μm.测试结果表明:该VCO频率覆盖范围为31～111MHz;功耗为0.3～6.9mW;在100kHz频偏处相位噪声约-110dBc/Hz.     

A Novel Offset-Cancellation Technique for Low Voltage CMOS Differential Amplifiers

基于对CMOS差分放大器的非线性和元件失配理解的基础上,提出了一种应用于低电压CMOS差分放大器的失调取消技术.这种技术在不需要增加功耗的基础上,通过把输出端的失调电压转移到差分放大器的其他节点,从而达到减小输入参考的失调电压的目的.为了验证这种技术,设计了一个工作电压为1.8V的低失调的CMOS差分放大器.仿真结果表明,在负载晶体管的失配为20%,输入放大管的失配为10%时,利用这种失调转移技术,输入参考的失调可以减少40%.同已发表的失调取消技术相比,利用这种技术可以达到更低的功耗和更高的集成度.     

一种新的自旋量子效应——电流感应磁化翻转

电流感应的磁化翻转效应是近年来继巨磁阻效应(GMR)和隧道磁阻效应(TMR)之后提出的一种nm尺度下新的自旋相关效应,在无外加磁场的情况下,垂直于铁磁层平面的自旋极化电流就能引起铁磁层的磁化翻转。该效应有望被用于制作新型的电流操纵磁存储器件。报道了该效应的理论和实验的研究进展。